248 lines
8.3 KiB
C
248 lines
8.3 KiB
C
/*
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* Copyright 2001 Mike Corrigan, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/threads.h>
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#include <linux/module.h>
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#include <linux/bitops.h>
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#include <asm/processor.h>
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#include <asm/ptrace.h>
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#include <asm/naca.h>
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#include <asm/abs_addr.h>
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#include <asm/iSeries/ItLpNaca.h>
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#include <asm/iSeries/ItLpPaca.h>
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#include <asm/iSeries/ItLpRegSave.h>
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#include <asm/paca.h>
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#include <asm/iSeries/HvReleaseData.h>
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#include <asm/iSeries/LparMap.h>
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#include <asm/iSeries/ItVpdAreas.h>
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#include <asm/iSeries/ItIplParmsReal.h>
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#include <asm/iSeries/ItExtVpdPanel.h>
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#include <asm/iSeries/ItLpQueue.h>
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#include <asm/iSeries/IoHriProcessorVpd.h>
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#include <asm/iSeries/ItSpCommArea.h>
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/* The LpQueue is used to pass event data from the hypervisor to
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* the partition. This is where I/O interrupt events are communicated.
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*/
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/* May be filled in by the hypervisor so cannot end up in the BSS */
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struct ItLpQueue xItLpQueue __attribute__((__section__(".data")));
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/* The HvReleaseData is the root of the information shared between
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* the hypervisor and Linux.
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*/
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struct HvReleaseData hvReleaseData = {
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0xc8a5d9c4, /* desc = "HvRD" ebcdic */
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sizeof(struct HvReleaseData),
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offsetof(struct naca_struct, xItVpdAreas),
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(struct naca_struct *)(NACA_VIRT_ADDR), /* 64-bit Naca address */
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0x6000, /* offset of LparMap within loadarea (see head.S) */
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0,
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1, /* tags inactive */
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0, /* 64 bit */
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0, /* shared processors */
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0, /* HMT allowed */
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6, /* TEMP: This allows non-GA driver */
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4, /* We are v5r2m0 */
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3, /* Min supported PLIC = v5r1m0 */
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3, /* Min usable PLIC = v5r1m0 */
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{ 0xd3, 0x89, 0x95, 0xa4, /* "Linux 2.4 "*/
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0xa7, 0x40, 0xf2, 0x4b,
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0xf4, 0x4b, 0xf6, 0xf4 },
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{0}
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};
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extern void SystemReset_Iseries(void);
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extern void MachineCheck_Iseries(void);
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extern void DataAccess_Iseries(void);
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extern void InstructionAccess_Iseries(void);
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extern void HardwareInterrupt_Iseries(void);
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extern void Alignment_Iseries(void);
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extern void ProgramCheck_Iseries(void);
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extern void FPUnavailable_Iseries(void);
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extern void Decrementer_Iseries(void);
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extern void Trap_0a_Iseries(void);
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extern void Trap_0b_Iseries(void);
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extern void SystemCall_Iseries(void);
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extern void SingleStep_Iseries(void);
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extern void Trap_0e_Iseries(void);
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extern void PerformanceMonitor_Iseries(void);
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extern void DataAccessSLB_Iseries(void);
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extern void InstructionAccessSLB_Iseries(void);
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struct ItLpNaca itLpNaca = {
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0xd397d581, /* desc = "LpNa" ebcdic */
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0x0400, /* size of ItLpNaca */
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0x0300, 19, /* offset to int array, # ents */
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0, 0, 0, /* Part # of primary, serv, me */
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0, 0x100, /* # of LP queues, offset */
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0, 0, 0, /* Piranha stuff */
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{ 0,0,0,0,0 }, /* reserved */
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0,0,0,0,0,0,0, /* stuff */
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{ 0,0,0,0,0 }, /* reserved */
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0, /* reserved */
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0, /* VRM index of PLIC */
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0, 0, /* min supported, compat SLIC */
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0, /* 64-bit addr of load area */
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0, /* chunks for load area */
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0, 0, /* PASE mask, seg table */
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{ 0 }, /* 64 reserved bytes */
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{ 0 }, /* 128 reserved bytes */
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{ 0 }, /* Old LP Queue */
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{ 0 }, /* 384 reserved bytes */
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{
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(u64)SystemReset_Iseries, /* 0x100 System Reset */
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(u64)MachineCheck_Iseries, /* 0x200 Machine Check */
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(u64)DataAccess_Iseries, /* 0x300 Data Access */
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(u64)InstructionAccess_Iseries, /* 0x400 Instruction Access */
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(u64)HardwareInterrupt_Iseries, /* 0x500 External */
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(u64)Alignment_Iseries, /* 0x600 Alignment */
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(u64)ProgramCheck_Iseries, /* 0x700 Program Check */
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(u64)FPUnavailable_Iseries, /* 0x800 FP Unavailable */
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(u64)Decrementer_Iseries, /* 0x900 Decrementer */
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(u64)Trap_0a_Iseries, /* 0xa00 Trap 0A */
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(u64)Trap_0b_Iseries, /* 0xb00 Trap 0B */
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(u64)SystemCall_Iseries, /* 0xc00 System Call */
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(u64)SingleStep_Iseries, /* 0xd00 Single Step */
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(u64)Trap_0e_Iseries, /* 0xe00 Trap 0E */
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(u64)PerformanceMonitor_Iseries,/* 0xf00 Performance Monitor */
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0, /* int 0x1000 */
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0, /* int 0x1010 */
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0, /* int 0x1020 CPU ctls */
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(u64)HardwareInterrupt_Iseries, /* SC Ret Hdlr */
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(u64)DataAccessSLB_Iseries, /* 0x380 D-SLB */
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(u64)InstructionAccessSLB_Iseries /* 0x480 I-SLB */
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}
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};
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EXPORT_SYMBOL(itLpNaca);
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/* May be filled in by the hypervisor so cannot end up in the BSS */
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struct ItIplParmsReal xItIplParmsReal __attribute__((__section__(".data")));
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/* May be filled in by the hypervisor so cannot end up in the BSS */
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struct ItExtVpdPanel xItExtVpdPanel __attribute__((__section__(".data")));
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EXPORT_SYMBOL(xItExtVpdPanel);
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#define maxPhysicalProcessors 32
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struct IoHriProcessorVpd xIoHriProcessorVpd[maxPhysicalProcessors] = {
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{
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.xInstCacheOperandSize = 32,
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.xDataCacheOperandSize = 32,
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.xProcFreq = 50000000,
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.xTimeBaseFreq = 50000000,
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.xPVR = 0x3600
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}
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};
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/* Space for Main Store Vpd 27,200 bytes */
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/* May be filled in by the hypervisor so cannot end up in the BSS */
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u64 xMsVpd[3400] __attribute__((__section__(".data")));
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/* Space for Recovery Log Buffer */
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/* May be filled in by the hypervisor so cannot end up in the BSS */
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u64 xRecoveryLogBuffer[32] __attribute__((__section__(".data")));
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struct SpCommArea xSpCommArea = {
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0xE2D7C3C2,
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1,
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{0},
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0, 0, 0, 0, {0}
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};
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/* The LparMap data is now located at offset 0x6000 in head.S
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* It was put there so that the HvReleaseData could address it
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* with a 32-bit offset as required by the iSeries hypervisor
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*
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* The Naca has a pointer to the ItVpdAreas. The hypervisor finds
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* the Naca via the HvReleaseData area. The HvReleaseData has the
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* offset into the Naca of the pointer to the ItVpdAreas.
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*/
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struct ItVpdAreas itVpdAreas = {
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0xc9a3e5c1, /* "ItVA" */
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sizeof( struct ItVpdAreas ),
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0, 0,
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26, /* # VPD array entries */
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10, /* # DMA array entries */
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NR_CPUS*2, maxPhysicalProcessors, /* Max logical, physical procs */
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offsetof(struct ItVpdAreas,xPlicDmaToks),/* offset to DMA toks */
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offsetof(struct ItVpdAreas,xSlicVpdAdrs),/* offset to VPD addrs */
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offsetof(struct ItVpdAreas,xPlicDmaLens),/* offset to DMA lens */
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offsetof(struct ItVpdAreas,xSlicVpdLens),/* offset to VPD lens */
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0, /* max slot labels */
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1, /* max LP queues */
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{0}, {0}, /* reserved */
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{0}, /* DMA lengths */
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{0}, /* DMA tokens */
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{ /* VPD lengths */
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0,0,0, /* 0 - 2 */
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sizeof(xItExtVpdPanel), /* 3 Extended VPD */
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sizeof(struct paca_struct), /* 4 length of Paca */
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0, /* 5 */
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sizeof(struct ItIplParmsReal),/* 6 length of IPL parms */
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26992, /* 7 length of MS VPD */
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0, /* 8 */
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sizeof(struct ItLpNaca),/* 9 length of LP Naca */
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0, /* 10 */
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256, /* 11 length of Recovery Log Buf */
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sizeof(struct SpCommArea), /* 12 length of SP Comm Area */
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0,0,0, /* 13 - 15 */
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sizeof(struct IoHriProcessorVpd),/* 16 length of Proc Vpd */
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0,0,0,0,0,0, /* 17 - 22 */
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sizeof(struct ItLpQueue),/* 23 length of Lp Queue */
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0,0 /* 24 - 25 */
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},
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{ /* VPD addresses */
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0,0,0, /* 0 - 2 */
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&xItExtVpdPanel, /* 3 Extended VPD */
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&paca[0], /* 4 first Paca */
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0, /* 5 */
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&xItIplParmsReal, /* 6 IPL parms */
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&xMsVpd, /* 7 MS Vpd */
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0, /* 8 */
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&itLpNaca, /* 9 LpNaca */
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0, /* 10 */
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&xRecoveryLogBuffer, /* 11 Recovery Log Buffer */
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&xSpCommArea, /* 12 SP Comm Area */
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0,0,0, /* 13 - 15 */
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&xIoHriProcessorVpd, /* 16 Proc Vpd */
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0,0,0,0,0,0, /* 17 - 22 */
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&xItLpQueue, /* 23 Lp Queue */
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0,0
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}
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};
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struct msChunks msChunks;
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/* Depending on whether this is called from iSeries or pSeries setup
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* code, the location of the msChunks struct may or may not have
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* to be reloc'd, so we force the caller to do that for us by passing
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* in a pointer to the structure.
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*/
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unsigned long
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msChunks_alloc(unsigned long mem, unsigned long num_chunks, unsigned long chunk_size)
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{
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unsigned long offset = reloc_offset();
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struct msChunks *_msChunks = PTRRELOC(&msChunks);
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_msChunks->num_chunks = num_chunks;
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_msChunks->chunk_size = chunk_size;
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_msChunks->chunk_shift = __ilog2(chunk_size);
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_msChunks->chunk_mask = (1UL<<_msChunks->chunk_shift)-1;
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mem = _ALIGN(mem, sizeof(msChunks_entry));
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_msChunks->abs = (msChunks_entry *)(mem + offset);
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mem += num_chunks * sizeof(msChunks_entry);
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return mem;
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}
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