123 lines
3.3 KiB
C
123 lines
3.3 KiB
C
#ifndef AEC62XX_H
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#define AEC62XX_H
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#include <linux/config.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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struct chipset_bus_clock_list_entry {
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byte xfer_speed;
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byte chipset_settings;
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byte ultra_settings;
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};
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static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
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{ XFER_UDMA_6, 0x31, 0x07 },
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{ XFER_UDMA_5, 0x31, 0x06 },
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{ XFER_UDMA_4, 0x31, 0x05 },
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{ XFER_UDMA_3, 0x31, 0x04 },
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{ XFER_UDMA_2, 0x31, 0x03 },
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{ XFER_UDMA_1, 0x31, 0x02 },
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{ XFER_UDMA_0, 0x31, 0x01 },
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{ XFER_MW_DMA_2, 0x31, 0x00 },
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{ XFER_MW_DMA_1, 0x31, 0x00 },
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{ XFER_MW_DMA_0, 0x0a, 0x00 },
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{ XFER_PIO_4, 0x31, 0x00 },
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{ XFER_PIO_3, 0x33, 0x00 },
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{ XFER_PIO_2, 0x08, 0x00 },
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{ XFER_PIO_1, 0x0a, 0x00 },
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{ XFER_PIO_0, 0x00, 0x00 },
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{ 0, 0x00, 0x00 }
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};
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static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
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{ XFER_UDMA_6, 0x41, 0x06 },
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{ XFER_UDMA_5, 0x41, 0x05 },
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{ XFER_UDMA_4, 0x41, 0x04 },
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{ XFER_UDMA_3, 0x41, 0x03 },
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{ XFER_UDMA_2, 0x41, 0x02 },
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{ XFER_UDMA_1, 0x41, 0x01 },
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{ XFER_UDMA_0, 0x41, 0x01 },
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{ XFER_MW_DMA_2, 0x41, 0x00 },
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{ XFER_MW_DMA_1, 0x42, 0x00 },
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{ XFER_MW_DMA_0, 0x7a, 0x00 },
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{ XFER_PIO_4, 0x41, 0x00 },
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{ XFER_PIO_3, 0x43, 0x00 },
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{ XFER_PIO_2, 0x78, 0x00 },
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{ XFER_PIO_1, 0x7a, 0x00 },
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{ XFER_PIO_0, 0x70, 0x00 },
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{ 0, 0x00, 0x00 }
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};
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#ifndef SPLIT_BYTE
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#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
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#endif
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#ifndef MAKE_WORD
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#define MAKE_WORD(W,HB,LB) ((W)=((HB<<8)+LB))
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#endif
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#define BUSCLOCK(D) \
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((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
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static void init_setup_aec6x80(struct pci_dev *, ide_pci_device_t *);
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static void init_setup_aec62xx(struct pci_dev *, ide_pci_device_t *);
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static unsigned int init_chipset_aec62xx(struct pci_dev *, const char *);
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static void init_hwif_aec62xx(ide_hwif_t *);
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static void init_dma_aec62xx(ide_hwif_t *, unsigned long);
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static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
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{ /* 0 */
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.name = "AEC6210",
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.init_setup = init_setup_aec62xx,
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.init_chipset = init_chipset_aec62xx,
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.init_hwif = init_hwif_aec62xx,
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.init_dma = init_dma_aec62xx,
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.channels = 2,
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.autodma = AUTODMA,
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.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
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.bootable = OFF_BOARD,
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},{ /* 1 */
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.name = "AEC6260",
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.init_setup = init_setup_aec62xx,
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.init_chipset = init_chipset_aec62xx,
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.init_hwif = init_hwif_aec62xx,
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.init_dma = init_dma_aec62xx,
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.channels = 2,
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.autodma = NOAUTODMA,
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.bootable = OFF_BOARD,
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},{ /* 2 */
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.name = "AEC6260R",
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.init_setup = init_setup_aec62xx,
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.init_chipset = init_chipset_aec62xx,
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.init_hwif = init_hwif_aec62xx,
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.init_dma = init_dma_aec62xx,
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.channels = 2,
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.autodma = AUTODMA,
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.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
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.bootable = NEVER_BOARD,
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},{ /* 3 */
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.name = "AEC6X80",
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.init_setup = init_setup_aec6x80,
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.init_chipset = init_chipset_aec62xx,
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.init_hwif = init_hwif_aec62xx,
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.init_dma = init_dma_aec62xx,
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.channels = 2,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD,
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},{ /* 4 */
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.name = "AEC6X80R",
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.init_setup = init_setup_aec6x80,
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.init_chipset = init_chipset_aec62xx,
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.init_hwif = init_hwif_aec62xx,
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.init_dma = init_dma_aec62xx,
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.channels = 2,
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.autodma = AUTODMA,
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.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
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.bootable = OFF_BOARD,
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}
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};
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#endif /* AEC62XX_H */
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