145 lines
3.9 KiB
C
145 lines
3.9 KiB
C
#ifndef PDC202XX_H
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#define PDC202XX_H
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#include <linux/config.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#ifndef SPLIT_BYTE
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#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
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#endif
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#define PDC202XX_DEBUG_DRIVE_INFO 0
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static const char *pdc_quirk_drives[] = {
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"QUANTUM FIREBALLlct08 08",
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"QUANTUM FIREBALLP KA6.4",
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"QUANTUM FIREBALLP KA9.1",
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"QUANTUM FIREBALLP LM20.4",
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"QUANTUM FIREBALLP KX13.6",
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"QUANTUM FIREBALLP KX20.5",
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"QUANTUM FIREBALLP KX27.3",
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"QUANTUM FIREBALLP LM20.5",
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NULL
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};
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/* A Register */
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#define SYNC_ERRDY_EN 0xC0
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#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */
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#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */
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#define IORDY_EN 0x20 /* PIO: IOREADY */
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#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
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#define PA3 0x08 /* PIO"A" timing */
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#define PA2 0x04 /* PIO"A" timing */
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#define PA1 0x02 /* PIO"A" timing */
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#define PA0 0x01 /* PIO"A" timing */
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/* B Register */
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#define MB2 0x80 /* DMA"B" timing */
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#define MB1 0x40 /* DMA"B" timing */
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#define MB0 0x20 /* DMA"B" timing */
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#define PB4 0x10 /* PIO_FORCE 1:0 */
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#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */
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#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
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#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
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#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */
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/* C Register */
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#define IORDYp_NO_SPEED 0x4F
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#define SPEED_DIS 0x0F
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#define DMARQp 0x80
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#define IORDYp 0x40
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#define DMAR_EN 0x20
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#define DMAW_EN 0x10
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#define MC3 0x08 /* DMA"C" timing */
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#define MC2 0x04 /* DMA"C" timing */
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#define MC1 0x02 /* DMA"C" timing */
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#define MC0 0x01 /* DMA"C" timing */
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static void init_setup_pdc202ata4(struct pci_dev *dev, ide_pci_device_t *d);
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static void init_setup_pdc20265(struct pci_dev *, ide_pci_device_t *);
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static void init_setup_pdc202xx(struct pci_dev *, ide_pci_device_t *);
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static unsigned int init_chipset_pdc202xx(struct pci_dev *, const char *);
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static void init_hwif_pdc202xx(ide_hwif_t *);
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static void init_dma_pdc202xx(ide_hwif_t *, unsigned long);
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static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
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{ /* 0 */
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.name = "PDC20246",
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.init_setup = init_setup_pdc202ata4,
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.init_chipset = init_chipset_pdc202xx,
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.init_hwif = init_hwif_pdc202xx,
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.init_dma = init_dma_pdc202xx,
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.channels = 2,
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.autodma = AUTODMA,
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#ifndef CONFIG_PDC202XX_FORCE
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.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
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#endif
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.bootable = OFF_BOARD,
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.extra = 16,
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},{ /* 1 */
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.name = "PDC20262",
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.init_setup = init_setup_pdc202ata4,
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.init_chipset = init_chipset_pdc202xx,
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.init_hwif = init_hwif_pdc202xx,
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.init_dma = init_dma_pdc202xx,
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.channels = 2,
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.autodma = AUTODMA,
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#ifndef CONFIG_PDC202XX_FORCE
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.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
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#endif
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.bootable = OFF_BOARD,
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.extra = 48,
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.flags = IDEPCI_FLAG_FORCE_PDC,
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},{ /* 2 */
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.name = "PDC20263",
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.init_setup = init_setup_pdc202ata4,
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.init_chipset = init_chipset_pdc202xx,
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.init_hwif = init_hwif_pdc202xx,
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.init_dma = init_dma_pdc202xx,
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.channels = 2,
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.autodma = AUTODMA,
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#ifndef CONFIG_PDC202XX_FORCE
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.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
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#endif
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.bootable = OFF_BOARD,
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.extra = 48,
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},{ /* 3 */
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.name = "PDC20265",
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.init_setup = init_setup_pdc20265,
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.init_chipset = init_chipset_pdc202xx,
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.init_hwif = init_hwif_pdc202xx,
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.init_dma = init_dma_pdc202xx,
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.channels = 2,
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.autodma = AUTODMA,
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#ifndef CONFIG_PDC202XX_FORCE
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.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
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#endif
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.bootable = OFF_BOARD,
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.extra = 48,
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.flags = IDEPCI_FLAG_FORCE_PDC,
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},{ /* 4 */
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.name = "PDC20267",
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.init_setup = init_setup_pdc202xx,
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.init_chipset = init_chipset_pdc202xx,
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.init_hwif = init_hwif_pdc202xx,
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.init_dma = init_dma_pdc202xx,
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.channels = 2,
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.autodma = AUTODMA,
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#ifndef CONFIG_PDC202XX_FORCE
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.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
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#endif
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.bootable = OFF_BOARD,
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.extra = 48,
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}
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};
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#endif /* PDC202XX_H */
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