317 lines
7.7 KiB
C
317 lines
7.7 KiB
C
/*
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* ich2rom.c
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*
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* Normal mappings of chips in physical memory
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* $Id: ich2rom.c,v 1.7 2003/05/21 12:45:18 dwmw2 Exp $
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/map.h>
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#include <linux/config.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#define RESERVE_MEM_REGION 0
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#define ICH2_FWH_REGION_START 0xFF000000UL
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#define ICH2_FWH_REGION_SIZE 0x01000000UL
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#define BIOS_CNTL 0x4e
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#define FWH_DEC_EN1 0xE3
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#define FWH_DEC_EN2 0xF0
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#define FWH_SEL1 0xE8
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#define FWH_SEL2 0xEE
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struct ich2rom_map_info {
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struct map_info map;
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struct mtd_info *mtd;
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unsigned long window_addr;
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};
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static inline unsigned long addr(struct map_info *map, unsigned long ofs)
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{
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unsigned long offset;
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offset = ((8*1024*1024) - map->size) + ofs;
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if (offset >= (4*1024*1024)) {
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offset += 0x400000;
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}
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return map->map_priv_1 + 0x400000 + offset;
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}
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static inline unsigned long dbg_addr(struct map_info *map, unsigned long addr)
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{
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return addr - map->map_priv_1 + ICH2_FWH_REGION_START;
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}
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static __u8 ich2rom_read8(struct map_info *map, unsigned long ofs)
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{
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return __raw_readb(addr(map, ofs));
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}
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static __u16 ich2rom_read16(struct map_info *map, unsigned long ofs)
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{
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return __raw_readw(addr(map, ofs));
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}
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static __u32 ich2rom_read32(struct map_info *map, unsigned long ofs)
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{
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return __raw_readl(addr(map, ofs));
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}
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static void ich2rom_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
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{
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memcpy_fromio(to, addr(map, from), len);
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}
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static void ich2rom_write8(struct map_info *map, __u8 d, unsigned long ofs)
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{
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__raw_writeb(d, addr(map,ofs));
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mb();
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}
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static void ich2rom_write16(struct map_info *map, __u16 d, unsigned long ofs)
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{
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__raw_writew(d, addr(map, ofs));
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mb();
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}
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static void ich2rom_write32(struct map_info *map, __u32 d, unsigned long ofs)
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{
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__raw_writel(d, addr(map, ofs));
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mb();
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}
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static void ich2rom_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
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{
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memcpy_toio(addr(map, to), from, len);
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}
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static struct ich2rom_map_info ich2rom_map = {
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.map = {
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.name = "ICH2 rom",
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.phys = NO_XIP,
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.size = 0,
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.buswidth = 1,
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.read8 = ich2rom_read8,
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.read16 = ich2rom_read16,
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.read32 = ich2rom_read32,
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.copy_from = ich2rom_copy_from,
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.write8 = ich2rom_write8,
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.write16 = ich2rom_write16,
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.write32 = ich2rom_write32,
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.copy_to = ich2rom_copy_to,
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/* Firmware hubs only use vpp when being programmed
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* in a factory setting. So in place programming
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* needs to use a different method.
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*/
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},
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.mtd = NULL,
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.window_addr = 0,
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};
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enum fwh_lock_state {
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FWH_DENY_WRITE = 1,
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FWH_IMMUTABLE = 2,
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FWH_DENY_READ = 4,
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};
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static int ich2rom_set_lock_state(struct mtd_info *mtd, loff_t ofs, size_t len,
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enum fwh_lock_state state)
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{
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struct map_info *map = mtd->priv;
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unsigned long start = ofs;
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unsigned long end = start + len -1;
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/* FIXME do I need to guard against concurrency here? */
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/* round down to 64K boundaries */
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start = start & ~0xFFFF;
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end = end & ~0xFFFF;
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while (start <= end) {
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unsigned long ctrl_addr;
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ctrl_addr = addr(map, start) - 0x400000 + 2;
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writeb(state, ctrl_addr);
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start = start + 0x10000;
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}
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return 0;
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}
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static int ich2rom_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
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{
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return ich2rom_set_lock_state(mtd, ofs, len, FWH_DENY_WRITE);
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}
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static int ich2rom_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
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{
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return ich2rom_set_lock_state(mtd, ofs, len, 0);
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}
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static int __devinit ich2rom_init_one (struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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u16 word;
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struct ich2rom_map_info *info = &ich2rom_map;
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unsigned long map_size;
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/* For now I just handle the ich2 and I assume there
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* are not a lot of resources up at the top of the address
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* space. It is possible to handle other devices in the
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* top 16MB but it is very painful. Also since
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* you can only really attach a FWH to an ICH2 there
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* a number of simplifications you can make.
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*
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* Also you can page firmware hubs if an 8MB window isn't enough
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* but don't currently handle that case either.
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*/
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#if RESERVE_MEM_REGION
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/* Some boards have this reserved and I haven't found a good work
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* around to say I know what I'm doing!
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*/
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if (!request_mem_region(ICH2_FWH_REGION_START, ICH2_FWH_REGION_SIZE, "ich2rom")) {
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printk(KERN_ERR "ich2rom: cannot reserve rom window\n");
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goto err_out_none;
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}
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#endif /* RESERVE_MEM_REGION */
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/* Enable writes through the rom window */
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pci_read_config_word(pdev, BIOS_CNTL, &word);
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if (!(word & 1) && (word & (1<<1))) {
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/* The BIOS will generate an error if I enable
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* this device, so don't even try.
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*/
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printk(KERN_ERR "ich2rom: firmware access control, I can't enable writes\n");
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goto err_out_none;
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}
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pci_write_config_word(pdev, BIOS_CNTL, word | 1);
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/* Map the firmware hub into my address space. */
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/* Does this use to much virtual address space? */
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info->window_addr = (unsigned long)ioremap(
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ICH2_FWH_REGION_START, ICH2_FWH_REGION_SIZE);
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if (!info->window_addr) {
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printk(KERN_ERR "Failed to ioremap\n");
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goto err_out_free_mmio_region;
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}
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/* For now assume the firmware has setup all relevant firmware
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* windows. We don't have enough information to handle this case
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* intelligently.
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*/
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/* FIXME select the firmware hub and enable a window to it. */
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info->mtd = NULL;
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info->map.map_priv_1 = info->window_addr;
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map_size = ICH2_FWH_REGION_SIZE;
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while(!info->mtd && (map_size > 0)) {
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info->map.size = map_size;
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info->mtd = do_map_probe("jedec_probe", &ich2rom_map.map);
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map_size -= 512*1024;
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}
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if (!info->mtd) {
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goto err_out_iounmap;
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}
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/* I know I can only be a firmware hub here so put
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* in the special lock and unlock routines.
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*/
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info->mtd->lock = ich2rom_lock;
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info->mtd->unlock = ich2rom_unlock;
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info->mtd->owner = THIS_MODULE;
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add_mtd_device(info->mtd);
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return 0;
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err_out_iounmap:
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iounmap((void *)(info->window_addr));
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err_out_free_mmio_region:
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#if RESERVE_MEM_REGION
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release_mem_region(ICH2_FWH_REGION_START, ICH2_FWH_REGION_SIZE);
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#endif
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err_out_none:
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return -ENODEV;
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}
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static void __devexit ich2rom_remove_one (struct pci_dev *pdev)
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{
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struct ich2rom_map_info *info = &ich2rom_map;
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u16 word;
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del_mtd_device(info->mtd);
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map_destroy(info->mtd);
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info->mtd = NULL;
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info->map.map_priv_1 = 0;
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iounmap((void *)(info->window_addr));
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info->window_addr = 0;
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/* Disable writes through the rom window */
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pci_read_config_word(pdev, BIOS_CNTL, &word);
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pci_write_config_word(pdev, BIOS_CNTL, word & ~1);
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#if RESERVE_MEM_REGION
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release_mem_region(ICH2_FWH_REGION_START, ICH2_FWH_REGION_SIZE);
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#endif
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}
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static struct pci_device_id ich2rom_pci_tbl[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0,
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PCI_ANY_ID, PCI_ANY_ID, },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0,
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PCI_ANY_ID, PCI_ANY_ID, },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0,
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PCI_ANY_ID, PCI_ANY_ID, },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, ich2rom_pci_tbl);
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#if 0
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static struct pci_driver ich2rom_driver = {
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.name = "ich2rom",
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.id_table = ich2rom_pci_tbl,
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.probe = ich2rom_init_one,
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.remove = ich2rom_remove_one,
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};
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#endif
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static struct pci_dev *mydev;
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int __init init_ich2rom(void)
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{
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struct pci_dev *pdev;
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struct pci_device_id *id;
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pdev = NULL;
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for(id = ich2rom_pci_tbl; id->vendor; id++) {
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pdev = pci_find_device(id->vendor, id->device, NULL);
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if (pdev) {
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break;
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}
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}
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if (pdev) {
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mydev = pdev;
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return ich2rom_init_one(pdev, &ich2rom_pci_tbl[0]);
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}
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return -ENXIO;
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#if 0
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return pci_module_init(&ich2rom_driver);
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#endif
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}
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static void __exit cleanup_ich2rom(void)
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{
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ich2rom_remove_one(mydev);
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}
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module_init(init_ich2rom);
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module_exit(cleanup_ich2rom);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
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MODULE_DESCRIPTION("MTD map driver for BIOS chips on the ICH2 southbridge");
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